In recent years, LSIs (Large Scale Integrated Circuit) have been progressing to be higher integrated and semiconductor devices have been progressing to be finer increasingly, and in line with them, it is required to improve controllability of a carrier concentration in a semiconductor wafer, for example, a silicon wafer for semiconductor device manufacturing as much as possible. Particularly, since a carrier concentration near the surface of the silicon wafer affects characteristics of the semiconductor device, such as resistivity, it is required to measure a concentration of an additional impurity (dopant) contained near the surface thereof with high precision and high sensitivity.
Note that a dopant described here is an intentionally added impurity in order to control a carrier concentration in a semiconductor wafer to control a resistivity thereof.
Generally, in order to control a carrier concentration in a silicon wafer, boron (B) is mainly used when a conductivity type is a p-type, and phosphorus (P) is mainly used when it is an n-type, as the dopant. Makers of semiconductor wafers control an additional amount of the dopant upon growing silicon single crystals to be used as materials of the silicon wafers, or the like so that the silicon wafers to be manufactured may have desired carrier concentrations or resistance values, and manufacture the silicon wafers.
Meanwhile, makers of semiconductor devices set a standard, for example, the resistivity is 8 to 12 Ω·cm, and have semiconductor wafers which satisfy the standard included in boxes and delivered. As a result, respective resistivities of the semiconductor wafers within the delivered box are different within the standard (within the range of 8 to 12 Ω·cm). The makers of the semiconductor devices put such silicon wafers that have respectively different resistivities within standard into semiconductor device manufacturing processes, and manufacture the semiconductor devices.
Meanwhile, there has occurred a problem, so-called dopant contamination, in which a dopant is unintentionally mixed from surrounding environments or the like without intentionally adding it for resistivity adjustment while manufacturing of a semiconductor device. Particularly, since an original dopant concentration is very low when a silicon wafer with the extremely high resistivity is used, the carrier concentration is changed only by a small amount of dopant being mixed in the silicon wafer, so that the resistivity thereof may be changed significantly.
For example, in a heat treatment process for manufacturing a semiconductor device, an unnecessary contaminant dopant, such as boron, phosphorus, or the like mixes in the semiconductor wafer from an atmosphere within a heat treat furnace, the heat treat furnace, or the like and the semiconductor wafer is contaminated, so that the carrier concentration may be changed. Such a dopant contamination causes a drop of a manufacturing yield of the semiconductor devices, and deterioration in quality thereof. Therefore, it is particularly important to evaluate and manage the dopant contamination in the manufacturing process of the semiconductor wafer and the manufacturing process of the semiconductor device.
As the method for evaluating dopant contamination described above, there is a method for evaluating the dopant contamination of the semiconductor wafer by a secondary ion mass spectroscopy (SIMS) or the like using chips being cut from the semiconductor wafer (for example, Japanese Unexamined Patent Publication (Kokai) No. 2004-207601).
SIMS is a method for impacting a surface of the cutout chip with primary ions, ionizing surface materials by sputter, and analyzing them with a mass spectrograph. According to this method, a distribution of the dopant concentration in a depth direction of the semiconductor wafer is first calculated, a difference between a value of the dopant concentration in the surface layer of the semiconductor wafer and a value of the dopant concentration in a bulk portion is then calculated from the concentration distribution, and the amount of dopant contamination in the surface layer portion of the semiconductor wafer is calculated from the difference.
This method is, however, a destructive evaluation in which the chips are cut out from the semiconductor wafer to be measured, and only the cutout chip portions can be measured, so that a map of the dopant in a plane has not been able to be obtained, in addition to spending a large amount of time and cost.